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IET Computers and Digital Techniques 期刊封面

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Review Cycle Records

IET Computers and Digital Techniques

IET / Wiley SCIE OA

2026新锐 4区2025中科院 4区2025 JCR Q4

查看审稿周期计算与数据来源报告数据问题

179.7平均天数

181.5中位天数

88最短天数

274最长天数

92025发文量

Paper Review Records

全部论文审稿周期

10 篇有效样本 · 按发表日期由新到旧排列
审稿天数=录用日期-收稿日期；保留 PDF/DOI/网页源链接

184 天

Multi‐objective digital circuit block optimisation based on cell mapping in an industrial electronic design automation flow

收稿 2022-12-13 录用 2023-06-15 发表 2023-07-26

作者Linan Cao; Simon J. Bale; Martin A. Trefzer

作者单位1. School of Physics, Engineering, and Technology University of York York UK

PDF源文件 DOI 网页

190 天

Design and analysis of a novel fast adder using logical effort method

收稿 2022-12-19 录用 2023-06-27 发表 2023-07-19

作者Hamid Tavakolaee; Gholamreza Ardeshir; Yasser Baleghi

作者单位1. Department of Electrical & Computer Engineering Babol Noshirvani University of Technology Babol Mazandaran Iran

PDF源文件 DOI 网页

161 天

Reconstructing a lightweight security protocol in the radio‐frequency identification systems

收稿 2023-01-18 录用 2023-06-28 发表 2023-07-14

作者Alireza Abdellahi Khorasgani; Mahdi Sajadieh; Mohammad Rouhollah Yazdani

作者单位1. Department of Electrical Engineering Isfahan (Khorasgan) Branch Islamic Azad University Isfahan Iran

PDF源文件 DOI 网页

88 天

Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system

收稿 2023-01-20 录用 2023-04-18 发表 2023-06-27

作者Yanjun Zhu; Zhisheng Wu; Cuirong Liu

作者单位1. School of Materials Science and Engineering Taiyuan University of Science and Technology Taiyuan China

PDF源文件 DOI 网页

130 天

A novel self‐timing CMOS first‐edge take‐all circuit for on‐chip communication systems

收稿 2023-01-02 录用 2023-05-12 发表 2023-06-21

作者Saleh Abdelhafeez; Shadi M. S. Harb

作者单位1. Department of Computer Engineering Jordan University of Science and Technology Irbid Jordan; 2. Department of Computer Engineering College of Computer Qassim University Buraydah Qassim Saudi Arabia; 3. Electrical and Computer Engineering Department University of Florida Gainesville Florida USA

PDF源文件 DOI 网页

232 天

An integrated taxonomy of standard indicators for ranking and selecting supercomputers

收稿 2022-10-02 录用 2023-05-22 发表 2023-06-20

作者Davood Maleki; Alireza Mansouri; Ehsan Arianyan

作者单位1. ICT Research Institute Tehran Iran

PDF源文件 DOI 网页

179 天

Compressing fully connected layers of deep neural networks using permuted features

收稿 2022-11-21 录用 2023-05-19 发表 2023-06-11

作者Dara Nagaraju; Nitin Chandrachoodan

作者单位1. Electrical Engineering Indian Institute of Technology Madras Chennai India

PDF源文件 DOI 网页

216 天

Verification of serialising instructions for security against transient execution attacks

收稿 2022-10-05 录用 2023-05-09 发表 2023-05-29

作者Kushal K. Ponugoti; Sudarshan K. Srinivasan; Nimish Mathure

作者单位1. Electrical and Computer Engineering North Dakota State University Fargo North Dakota USA

PDF源文件 DOI 网页

143 天

Residual vulnerabilities to power side channel attacks of lightweight ciphers cryptography competition finalists

收稿 2022-12-05 录用 2023-04-27 发表 2023-05-22

作者Aurelien T. Mozipo; John M. Acken

作者单位1. Department of Electrical and Computer Engineering Portland State University and Intel Corporation Portland Oregon USA; 2. Department of Electrical and Computer Engineering Portland State University Portland Oregon USA

PDF源文件 DOI 网页

274 天

Efficient implementation of low cost and secure framework with firmware updates

收稿 2022-07-07 录用 2023-04-07 发表 2023-05-10

作者Ines Ben Hlima; Halim Kacem; Ali Gharsallah

作者单位1. Faculty of Sciences of Tunis Tunis Tunisia

PDF源文件 DOI 网页

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可以。先按 90 天时限做可行性筛选，同步查找无基金、无知名作者挂靠的典型论文案例，作为选刊依据。重点核对研究质量与期刊 scope。

拟题建议: 《融合机器学习与生命周期评价的城市污水处理碳排放预测与优化》
数据库初筛: Environmental Technology & Innovation

样本口径2026 年最近 5 篇有效论文样本

平均审稿96.4 天

中位数77 天

IET Computers and Digital Techniques

全部论文审稿周期

Multi‐objective digital circuit block optimisation based on cell mapping in an industrial electronic design automation flow

Design and analysis of a novel fast adder using logical effort method

Reconstructing a lightweight security protocol in the radio‐frequency identification systems

Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system

A novel self‐timing CMOS first‐edge take‐all circuit for on‐chip communication systems

An integrated taxonomy of standard indicators for ranking and selecting supercomputers

Compressing fully connected layers of deep neural networks using permuted features

Verification of serialising instructions for security against transient execution attacks

Residual vulnerabilities to power side channel attacks of lightweight ciphers cryptography competition finalists

Efficient implementation of low cost and secure framework with firmware updates

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IET Computers and Digital Techniques

全部论文审稿周期

Multi‐objective digital circuit block optimisation based on cell mapping in an industrial electronic design automation flow

Design and analysis of a novel fast adder using logical effort method

Reconstructing a lightweight security protocol in the radio‐frequency identification systems

Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system

A novel self‐timing CMOS first‐edge take‐all circuit for on‐chip communication systems

An integrated taxonomy of standard indicators for ranking and selecting supercomputers

Compressing fully connected layers of deep neural networks using permuted features

Verification of serialising instructions for security against transient execution attacks

Residual vulnerabilities to power side channel attacks of lightweight ciphers cryptography competition finalists

Efficient implementation of low cost and secure framework with firmware updates

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